Discussion:
186 24-Bit Addressing
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Wilton Helm
2011-09-29 21:46:25 UTC
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The only processor I know of that uses 186 24 bit addressing is the Dstni
series, so I'm guessing that is what you are using. Yes, there is support
for it. I implemented it a few years ago. It was broken in 1.8, but I have
been told it has been fixed, although I haven't had a chance to test it (I
use an older version of the linker and have been overloaded with production
code).

OP HSHIFT=8 sets it up. Note that you can also set the __HShift assembly
variable to 8 which will make the huge memory model RTL code generate proper
addressing.

The linker also has locate additions to allow a forced starting address for
each segment or group of segments and forced segment ordering, and COPY and
NOEMIT options to allow initialized data to be located in ROM but addressed
in RAM (you have to provide startup code to do the copying).

If you have other questions or would like some samples, I can provide them.
I develop quite a bit of code for these processors using the IDE and other
tools. I have RS-232 based remote debugging for Windows hosted debugging,
although some recent changes in the debugger have broken parts of it and I
haven't had time to figure out why.

Wilton
Wilton Helm
2011-09-29 21:47:17 UTC
Permalink
P.S.: The linker command line options are documented in the Linker
documentation.
Edward Schram
2011-10-13 00:51:58 UTC
Permalink
Post by Wilton Helm
The only processor I know of that uses 186 24 bit addressing is the
Dstni series, so I'm guessing that is what you are using. Yes, there
is support for it. I implemented it a few years ago. It was broken in
1.8, but I have been told it has been fixed, although I haven't had a
chance to test it (I use an older version of the linker and have been
overloaded with production code).
OP HSHIFT=8 sets it up. Note that you can also set the __HShift
assembly variable to 8 which will make the huge memory model RTL code
generate proper addressing.
The linker also has locate additions to allow a forced starting address
for each segment or group of segments and forced segment ordering, and
COPY and NOEMIT options to allow initialized data to be located in ROM
but addressed in RAM (you have to provide startup code to do the
copying).
If you have other questions or would like some samples, I can provide
them. I develop quite a bit of code for these processors using the IDE
and other tools. I have RS-232 based remote debugging for Windows
hosted debugging, although some recent changes in the debugger have
broken parts of it and I haven't had time to figure out why.
Wilton
Wilton,

Thanks, if you could send an example that would be great.

I am using an embedded 80186/80188 in my design and I only need to use
the 24 bit addressing to be able to use a 512k boot flash and a 512k
program flash. I will not be accessing more than 512K at a time. When
the system boots it does a crc on the program memory and if it is good
then the code jumps to the starting location and runs from there. RAM
will always be located at address 0. So far it has been fitting into
less than 64K using the small memory model. 64K data, 64K stack, 64K
program.

I have the startup code running and I use it to zero the ram, then copy
the constants (presets) into the proper place in ram.

Did the linker get fixed so that I can use the locate commands in the
linker script now? I have been staying with the old version per your
earlier advice. This is my linker script for the current small
bootloader that just jumps to the main code.

order
clname BEGDATA segaddr = 0x0040 NOEMIT
segment _NULL
segment _AFTERNULL
clname DATA NOEMIT
segment _DATA
clname BSS NOEMIT
segment BSS
clname STACK NOEMIT
clname FAR_DATA
clname CODE segaddr=0xF800
segment BEGTEXT
segment _TEXT
clname CHARSET
clname LOGOSEG
clname ROMDATA copy BEGDATA
clname START segaddr=0xFFFF

Ed
Wilton Helm
2011-10-14 02:51:12 UTC
Permalink
Based on what you are saying I'm not sure if 24 bit addressing is what you
really want. You say you are using an embedded 186/188 processor. The only
one that supports 24 bit that I know of is the Dstni series. If you are
just trying to make room for the two ROMs to alternately be used, then some
form of bank switching might be more suitable.

That being said, if you want some samples, I need an E-Mail address to send
them to. I can't attach a zip file here (it would be rejected).

Wilton

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